The present invention generally relates to a multi-port semiconductor memory, and more particularly, to a multi-port semiconductor memory which has at least one write/read port and at least one read port. More specifically, the present invention is directed to an improvement in a sense amplifier provided in a read system of such a multi-port semiconductor memory.
There is known a multi-port semiconductor memory having a BiCMOS structure. Bipolar transistors are used for forming a differential amplifier serving as a write sense amplifier provided in a write/read system and a differential amplifier serving as a read sense amplifier provided in a read system. CMOS transistors composed of p-channel insulated gate type field effect transistors (hereinafter simply referred to as pMOS transistors) and n-channel insulated gate type field effect transistors (hereinafter simply referred to as nMOS transistors) are used for forming circuits other than the above-mentioned differential circuits. Such a BiCMOS type semiconductor memory operates at a speed higher than that of a MOS type semiconductor memory in which all transistors are of the MOS type.
In a semiconductor memory having a write/read system and a read system as described above, there is a case where the read system is requested to read data which is to be written by the write/read system in the same cycle. That is, it is requested that the data writing to be carried out by the write/read system at the same time as the data reading by the read system.
However, a conventional multi-port semiconductor memory presents the following disadvantage. When the read system tries to read data which is to be written into a memory cell by the write/read system, the read system must wait for the completion of the data writing operation by the write/read system. That is, it is impossible for the read system to read the data before the next cycle starts. This prevents the speeding up of data processing.